Publikationen, an denen er mitarbeitet YURI TORRES DE LA SIERRA (5)

2025

  1. Accelerating Scientific Model Optimization with a Pipelined FPGA-Based Differential Evolution Engine

    Proceedings - 2025 IEEE 33rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2025

  2. Challenging Portability Paradigms: FPGA Acceleration Using SYCL and OpenCL

    Lecture Notes in Computer Science

  3. Comparing Portability of FPGA High-Level Synthesis Frameworks in the Context of a Highly-Parallel Application

    IEEE Access, Vol. 13, pp. 50394-50410

2024

  1. The Role of Field-Programmable Gate Arrays in the Acceleration of Modern High-Performance Computing Workloads

    Computer, Vol. 57, Núm. 7, pp. 66-76

2023

  1. EPSILOD: efficient parallel skeleton for generic iterative stencil computations in distributed GPUs

    Journal of Supercomputing, Vol. 79, Núm. 9, pp. 9409-9442